ST5451D datasheet(12/34 Pages) STMICROELECTRONICS

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4 - WORKING PROCEDURES

4 - 1 - RECEIVE FRAME

Recognized frame (by means of SAPI and/or TEI

identification), having a minimum length is stored

in the RFIFO with all bytes between the opening

flag and CRC field.

When the frame is less than or equal to 32 bytes,

is transferred in one block, and just after the re-

ceiving completion interrupt (RME), a status byte

is appended at the end. The frame and its status

byte remain stored until

µP acknowledgement

(RMC).

When the frame is longer than 32 bytes, blocks of

32 bytes plus one remainder block of lenght 1 to

32 are transferred to the microprocessor. The re-

ceiving 32 byte block generates a RPF interrupt

and the data in RFIFO remains valid until

µPac-

knowledgement (RMC).

The

µP can ignore a received frame by meaning

RMD (Receive Memory Delete), reaction to RPF

or RME. The part of frame already stored is de-

leted and the remainder frame is ignored by the

HDLC Controller.

The last block of the frame generates the RME in-

terrupt.

RFBC register bits 0 to 4 indicate the number of

bytes currently stored in the RFIFO. Bits 5 to 7 in-

dicate the total number of 32 byte blocks already

received. Bits 5 to 7 do not overflow. When the

counter status 7 has been reached, it indicates a

frame length greater than 223 bytes (see Table

3).

RFBC register is valid only after the RME inter-

rupt and remains valid until

RMC acknow-

ledgement by

µP.

At each read access by the

µP, RFBC 5/7 bits re-

main unchanged, RFBC 0/4 bits are decreased to

reach value 0 when the whole block is read.

Interrupts are queued inside the device. They are

sent one by one to the microprocessor after each

acknowledgement RMC. If a frame is lost be-

cause the RFIFO was full, a RFO interrupt is gen-

erated.

Figure 1: Receiving of an HDCL frame

ST5451

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