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ST6215 数据表(PDF) 49 Page - STMicroelectronics |
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ST6215 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 105 page ![]() ST6215C/ST6225C 49/105 8-BIT TIMER (Cont’d) 9.2.4 Functional Description There are three operating modes, which are se- lected by the TOUT and DOUT bits (see TSCR register). These three modes correspond to the two clocks which can be connected to the 7-bit prescaler (fINT ÷ 12 or TIMER pin signal), and to the output mode. The settings for the different operating modes are summarized Table 12. Table 12. Timer Operating Modes 9.2.4.1 Gated Mode (TOUT = “0”, DOUT = “1”) In this mode, the prescaler is decremented by the Timer clock input, but only when the signal on the TIMER pin is held high (fINT/12 gated by TIMER pin). See Figure 28 and Figure 29. This mode is selected by clearing the TOUT bit in the TSCR register (i.e. as input) and setting the DOUT bit. Note: In this mode, if the TIMER pin is multi- plexed, the corresponding port control bits have to be set in input with pull-up configuration through the DDR, OR and DR registers. For more details, please refer to the I/O Ports section. Figure 28. fTIMER Clock in Gated Mode Figure 29. Gated Mode Operation TOUT DOUT Timer Function Application 00 Event Counter (input) External counter clock source 01 Gated input (input) External Pulse length measurement 10 Output “0” (output) Output signal 11 Output “1” (output) generation fPRESCALER TIMER fINT/12 fEXT xx1 1 COUNTER VALUE TIMER PIN TIMER CLOCK VALUE 1 VALUE 2 PULSE LENGTH xx2 1 |
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