ST72521 datasheet(7/211 Pages) STMICROELECTRONICS

7 / 211 page

ST72521

7/211

1 INTRODUCTION

The ST72521(A)R and ST72521M devices are

members of the ST7 microcontroller family de-

signed for mid-range applications with a CAN bus

interface (Controller Area Network).

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set and are available with FLASH or ROM pro-

gram memory.

Under software control, all devices can be placed

in WAIT, SLOW, ACTIVE-HALT or HALT mode,

reducing power consumption when the application

is in idle or stand-by state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication

and indirect addressing

modes.

Figure 1. Device Block Diagram

8-BIT CORE

ALU

OSC1

VPP

CONTROL

PROGRAM

(32K - 60K Bytes)

VDD

RESET

PORT F

PF7:0

(8-bits)

TIMER A

BEEP

PORT A

RAM

(1024-2048 Bytes)

PORT C

10-BIT ADC

VAREF

VSSA

PORT B

PB7:0

(8-bits)

PWM ART

PORT E

CAN

PE7:0

(8-bits)

SCI

TIMER B

PA7:0

(8-bits)

PORT D

PD7:0

(8-bits)

SPI

PC7:0

(8-bits)

VSS

WATCHDOG

TLI

OSC

LVD

OSC2

MEMORY

MCC/RTC/BEEP

EVD

AVD

I2C

1On some devices only, see Device Summary on page 1

PORT G1

PG7:0

(8-bits)

PORT H1

PH7:0

(8-bits)

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