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ST7285C 数据表(PDF) 22 Page - STMicroelectronics |
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ST7285C 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 117 page ![]() 22/117 ST7285C 3.6 POWER SAVING MODES 3.6.1 Slow Mode The following Power Saving mode may be select- ed by setting the relevant bits in the Miscellaneous register as detailed in Section3.2. In Slow Mode, the oscillator frequency can be di- vided by 4, 8, 16 or 32 rather than by 2. The CPU and peripherals are clocked at this lower frequen- cy, and therefore the RDS filter cannot operate correctly in this mode. SLOW mode is used to re- duce power consumption, and enables the user to adapt clock frequency to available supply voltage. 3.6.2 Wait Mode WAIT mode places the MCU in a low power con- sumption mode by stopping the CPU. All peripher- als remain active. During WAIT mode, the I bit (CC Register) is cleared, so as to enable all interrupts. All other registers and memory remain un- changed. The MCU will remain in WAIT mode until an Interrupt or Reset occurs, whereupon the Pro- gram Counter branches to the starting address of the Interrupt or Reset Service Routine. Refer to Figure 11 below. Figure 11. Wait Mode Flow Chart WAIT WAIT Y VR02062D N Y Y N EXTERNAL INTERRUPT RESET RESTART PROCESSOR CLOCK FETCH RESET VECTOR OR SERVICE INTERRUPT PERIPHERAL INTERRUPT N ACTIVE OSCILLATOR AND PERIPHERALS CLOCKS ACTIVE PROCESSOR CLOCK STOPPED |
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