ST9291 datasheet(12/20 Pages) STMICROELECTRONICS

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1.1.3.2 Flag Register

The Flag Register contains 8 flags indicating the

statusof the ST9. During an interrupt the flag register

is automatically stored in the system stack area and

recalled at the end of the interrupt service routine so

that the ST9 is returned to the original status. This

occurs for all interrupts and, when operating in the

nested mode, up to seven versions of the flag regis-

ter may be stored.

FLAGR R231 (E7h) System Read/Write

Flag Register

Reset value: undefined

b7 = C:

Carry Flag. The carry flag C is affected by

the following instructions:

Addition (add, addw, adc, adcw),

Subtraction (sub, subw, sbc, sbcw),

Compare (cp, cpw),

Shift Right Arithmetic (sra, sraw),

Rotate (rrc, rrcw, rlc, rlcw, ror, rol),

Decimal Adjust (da),

Multiply and Divide (mul, div, divws).

When set, it generally indicates a carry out of the

most significant bit position of the register being

used as an accumulator (bit 7 for byte and bit 15 for

word operations).

The carry flag can be set by the Set Carry Flag (scf)

instruction, cleared by the Reset Carry Flag (rcf)in-

struction, and complemented (changed to “0” if “1”,

and vice versa) by the Complement Carry Flag (ccf)

instruction.

b6 = Z:

Zero Flag. The Zero flag is affected by the

following instructions:

Addition (add, addw, adc, adcw),

Subtraction (sub, subw, sbc, sbcw),

Compare (cp, cpw),

Shift Right Arithmetic (sra, sraw),

Rotate (rrc, rrcw, rlc, rlcw, ror, rol),

Decimal Adjust (da),

Multiply and Divide (mul, div, divws),

Logical (and, andw, or, orw, xor, xorw,

cpl

Increment and Decrement (inc, incw, dec,

decw

Test (tm, tmw, tcm, tcmw, btset).

In most cases, the Zero flag is set when the register

being used as an accumulator register is zero, follow-

ing one of the above operations.

b5 = S:

Sign Flag. The Sign flag is affected by the

same instructions as the Zero flag.

The Sign flag is set when bit 7 (for byte operation)

or bit 15 (for word operation) of the register used as

an accumulator is one.

b4 = V:

Overflow Flag. The Overflow flag is af-

fected by the same instructions as the Zero and

Sign flags.

When set, the Overflow flag indicates that a two’s-

complement number, in a result register, is in error,

since it has exceeded the largest (or is less than

the smallest), number that can be represented in

twos-complement notation.

b3 = DA:

Decimal Adjust Flag. The Decimal Adjust

flag is used for BCD arithmetic. Since the algorithm

for correcting BCD operations is different for addi-

tion and subtraction, this flag is used to specify

which type of instruction was executed last, so that

the subsequent Decimal Adjust (da) operation can

perform its function correctly.

The Decimal Adjust flag cannot normally be used

as a test condition by the programmer.

b2 = H:

Half Carry Flag. The Half Carry flag indi-

cates a carry out of (or a borrow into) bit 3, as the

result of adding or subtracting two 8-bit bytes, each

representing two BCD digits. The Half Carry flag is

used by the Decimal Adjust (da) instruction to con-

vert the binary result of a previous addition or sub-

traction into the correct BCD result.

Like the Decimal Adjust flag, this flag is not nor-

mally accessed by the user.

b1 = UF:

User Flag. Bit 1 in the flag register (UF) is

available to the user, but it must be set or cleared

by an instruction.

b0 = DP:

Data/Program Memory Flag. This bit in

the flag register indicates which memory area is

addressed. Its value is affected by the Set Data

Memory (sdm) and Set Program Memory (spm) in-

structions.

If the bit is set, the ST9 addresses the Data Mem-

ory Area; when the bit is cleared, the ST9 ad-

dresses the Program Memory Area. By reading

this bit, the user can verify in which memory area

the processor is working. The user writes this bit

with the sdm or spm instructions.

SYSTEM REGISTERS (Continued)

ST9291

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