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ST95022 数据表(PDF) 11 Page - STMicroelectronics |
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ST95022 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 16 page ![]() Symbol Alt Parameter Test Condition Min Max Unit fC fC Clock Frequency D.C. 2.1 MHz tSLCH tCSS S Active Setup Time (relative to the rising edge of C) 100 ns tCHSL S Not Active Hold Time (relative to the rising edge of C) 100 ns tCH (1) tCLH Clock High Time 190 ns tCL (1) tCLL Clock Low Time 190 ns tCLCH tRC Clock Rise Time 1 µs tCHCL tFC Clock Fall Time 1 µs tDVCH tDSU Data In Setup Time 50 ns tCHDX tDH Data In Hold Time 50 ns tDLDH tRI Data In Rise Time 1 µs tDHDL tFI Data In Fall Time 1 µs tHHCH tHSU HOLD Setup Time 100 ns tHLCH Clock Low Hold Time after HOLD Active 100 ns tCLHL tHH HOLD Hold Time 80 ns tCLHH Clock Low Set-up Time before HOLD Inactive 100 ns tCHSH S Active Hold Time (relative to the rising edge of C) 200 ns tSHCH S Not Active Setup Time (relative to the rising edge of C) 100 ns tSHSL tCSH S Deselect Time 200 ns tSHQZ tDIS Output Disable Time 150 ns tCLQV tV Clock Low to Output Valid 240 ns tCLQX tHO Output Hold Time 0 ns tQLQH (2) tRO Output Rise Time 100 ns tQHQL (2) tFO Output Fall Time 100 ns tHHQX tLZ HOLD High to Output Low-Z 100 ns tHLQZ tHZ HOLD Low to Output High-Z 200 ns tW tWP Write Cycle Time 7 ms Notes: 1. tCH + tCL ≥ 1/fc 2. Value guaranteed by characterization, not 100% tested in production. Table 8. AC Characteristics (TA = –40 to 125 °C; VCC = 4.5V to 5.5V) 11/16 ST95022 |
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