| 数据搜索系统,热门电子元器件搜索 |
|
ADE5569 数据表(PDF) 21 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE5569 数据表(HTML) 21 Page - Analog Devices |
|
21 / 148 page ![]() Preliminary Technical Data ADE5166/ADE5169/ADE5566/ADE5569 Rev. PrB | Page 21 of 148 POWER MANAGEMENT The ADE5166/ADE5169/ADE5566/ADE5569 have elaborate power management circuitry that manages the regular power supply to battery switchover and power supply failures. The power management functionalities can be accessed directly through the 8052 SFRs (see Table 15). Table 15. Power Management SFRs SFR Address R/W Mnemonic Description 0xEC R/W IPSME Power management interrupt enable. See Table 20. 0xF5 R/W BATPR Battery switchover configuration. See Table 18. 0xF8 R/W IPSMF Power management interrupt flag. See Table 17. 0xFF R/W INTPR Interrupt pins configuration. See Table 16. 0xF4 R/W PERIPH Peripheral configuration. See Table 19. 0xC5 R/W POWCON Power control. See Table 25. 0xFB R/W SCRATCH1 Scratch Pad 1. See Table 21. 0xFC R/W SCRATCH2 Scratch Pad 2. See Table 22. 0xFD R/W SCRATCH3 Scratch Pad 3. See Table 23. 0xFE R/W SCRATCH4 Scratch Pad 4. See Table 24. POWER MANAGEMENT REGISTER DETAILS Table 16. Interrupt Pins Configuration SFR (INTPR, 0xFF) Bit Mnemonic Default Description 7 RTCCAL 0 Controls RTC calibration output. When set, the RTC calibration frequency selected by FSEL[1:0] is output on the P0.2/CF1/RTCCAL pin. 6 to 5 FSEL[1:0] 00 Sets RTC calibration output frequency and calibration window. FSEL[1:0] Result (Calibration window, frequency) 00 30.5 sec, 1 Hz 01 30.5 sec, 512 Hz 10 0.244 sec, 500 Hz 11 0.244 sec, 16.384 kHz 4 Reserved N/A 3 to 1 INT1PRG[2:0] 000 Controls the function of INT1. INT1PRG[2:0] Result X00 GPIO enabled X01 BCTRL enabled 01X INT1 input disabled 11X INT1 input enabled 0 INT0PRG 0 Controls the function of INT0. INT0PRG Result 0 INT0 input disabled 1 INT0 input enabled Writing to the Interrupt Pins Configuration SFR (INTPR, 0xFF) To protect the RTC from runaway code, a key must be written to the key SFR (KYREG, 0xC1) to obtain write access to INTPR. KYREG (see Table 116) should be set to 0xEA to unlock this SFR and reset to zero after a timekeeping register is written to. The RTC registers can be written using the following 8052 assembly code: MOV KYREG, #0EAh MOV INTPR, #080h |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |