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AT89C51CC03U-RDTIM 数据表(PDF) 102 Page - ATMEL Corporation |
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AT89C51CC03U-RDTIM 数据表(HTML) 102 Page - ATMEL Corporation |
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102 / 183 page  102 AT89C51CC03 4182B–CAN–09/03 Table 49. CANGSTA Register CANGSTA (S:AAh) CAN General Status Register Note: 1. These fields are Read Only. Reset Value = x0x0 0000b 7654 3210 - OVFG - TBSY RBSY ENFG BOFF ERRP Bit Number Bit Mnemonic Description 7- Reserved The values read from this bit is indeterminate. Do not set this bit. 6OVFG Overload Frame Flag (1) This status bit is set by the hardware as long as the produced overload frame is sent. This flag does not generate an interrupt 5- Reserved The values read from this bit is indeterminate. Do not set this bit. 4TBSY Transmitter Busy (1) This status bit is set by the hardware as long as the CAN transmitter generates a frame (remote, data, overload or error frame) or an ack field. This bit is also active during an InterFrame Spacing if a frame must be sent. This flag does not generate an interrupt. 3 RBSY Receiver Busy (1) This status bit is set by the hardware as long as the CAN receiver acquires or monitors a frame. This flag does not generate an interrupt. 2ENFG Enable On-chip CAN Controller Flag(1) Because an enable/disable command is not effective immediately, this status bit gives the true state of a chosen mode. This flag does not generate an interrupt. 1BOFF Bus Off Mode (1) see Figure 49 0 ERRP Error Passive Mode (1) see Figure 49 |
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