M41ST85W datasheet(25/41 Pages) STMICROELECTRONICS

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M41ST85W

Clock operation

25/41

IRQ/FT/OUT pin. This will also disable the watchdog function until it is again programmed

correctly. A READ of the Flags Register will reset the Watchdog Flag (Bit D7; Register 0Fh).

The watchdog function is automatically disabled upon power-up and the Watchdog Register

is cleared. If the watchdog function is set to output to the IRQ/FT/OUT pin and the frequency

test function is activated, the watchdog function prevails and the frequency test function is

denied.

3.6

Square wave output

The M41ST85W offers the user a programmable square wave function which is output on

the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency.

These frequencies are listed in Table 4. Once the selection of the SQW frequency has been

completed, the SQW pin can be turned on and off under software control with the Square

Wave Enable Bit (SQWE) located in Register 0Ah.

Table 4.

Square wave output frequency

3.7

Power-on reset

The M41ST85W continuously monitors VCC. When VCC falls to the power fail detect trip

point, the RST pulls low (open drain) and remains low on power-up for trec after VCC passes

VPFD(max). The RST pin is an open drain output and an appropriate pull-up resistor should

be chosen to control rise time.

Square wave bits

Square wave

RS3

RS2

RS1

RS0

Frequency

Units

0000

None

–

0001

32.768

kHz

0010

8.192

kHz

0011

4.096

kHz

0100

2.048

kHz

0101

1.024

kHz

0110

512

0111

256

1000

128

1001

1010

1011

11008

11014

11102

11111

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