ST6208LD1SLASHOTP datasheet(79/104 Pages) STMICROELECTRONICS

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EMC CHARACTERISTICS (Cont’d)

10.7.2.2 Static and Dynamic Latch-Up

LU: 3 complementary static tests are required

on 10 parts to assess the latch-up performance.

A supply overvoltage (applied to each power

supply pin), a current injection (applied to each

input, output and configurable I/O pin) and a

power supply switch sequence are performed

on each sample. This test conforms to the EIA/

JESD 78 IC latch-up standard. For more details,

refer to the AN1181 application note.

DLU: Electro-Static Discharges (one positive

then one negative test) are applied to each pin

of 3 samples when the micro is running to

assess the latch-up performance in dynamic

mode. Power supplies are set to the typical

values, the oscillator is connected as near as

possible to the pins of the micro and the

component is put in reset mode. This test

conforms to the IEC1000-4-2 and SAEJ1752/3

standards and is described in Figure 58. For

more details, refer to the AN1181 application

note.

Electrical Sensitivities

Notes:

1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-

ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the

JEDEC criteria (international standard).

2. Schaffner NSG435 with a pointed test finger.

Figure 58. Simplified Diagram of the ESD Generator for DLU

Symbol

Parameter

Conditions

Class 1)

Static latch-up class

TA=+25°C

TA=+85°C

DLU

Dynamic latch-up class

VDD=5V, fOSC=4MHz, TA=+25°C

RCH=50MΩ

RD=330Ω

CS=150pF

ESD

HV RELAY

DISCHARGE TIP

DISCHARGE

RETURN CONNECTION

GENERATOR 2)

ST6

VDD

VSS

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