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April 2003

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24mA CMOS OUTPUT DRIVE CURRENT

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LVTTL INPUT THRESHOLDS

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CONTROLLED SKEW BETWEEN DATA AND

CLOCK SIGNALS

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LVDS INPUT-OUTPUT UP TO 155 MHZ

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IMPROVED LATCH-UP IMMUNITY UP TO

300mA

DESCRIPTION

The STLVD112 is a low voltage differential to

LVTTL signal converter with enhanced loop-back

and crosspoint features. The synchronous design

allows a phase alignment between a clock and its

data; this means a better BER (Bit Error Rate)

performance.

The advanced 0.35µm technology makes the

STLVD112 suitable for data rates up to 200Mbit.

The main application field is SDH/SONET telecom

infrastructure. The STLVD112 flexible switch

architecture makes it easy to implement multiple

protection schemes in STM1 access systems.

Thanks to the flexible multiplexing allowed, it

becomes simple to redirect the data/clock signal

coming from the faulty access card to the spare

card. In normal mode the STLVD112 converts the

differential data levels of the LVDS and related

clock signal from (to) the line interface in LVTTL

level signals to (from) the backpanel. In addition

the switch functions prevent the equipment from

line interface faults. In fact, it is possible to switch

the signals coming from a different line interface to

the local line interface or the signals from the local

line interface to a different line interface.

ORDERING CODES

Type

Temperature

Range

Package

Comments

STLVD112BTR

-40 to 85 °C

TSSOP48 (Tape & Reel)

1000 parts per reel

STLVD112CTR

0 to 70 °C

TSSOP48 (Tape & Reel)

1000 parts per reel

STLVD112

HIGH SPEED PROTECTION SWITCH

TSSOP