STP24DP05 datasheet(15/26 Pages) STMICROELECTRONICS

15 / 26 page

STP24DP05

Feature description

15/26

Feature description

7.1

DG: gradual outputs delay

This feature prevents large inrush current and reduces the bypass capacitors.

The fixed delay time can be activated with DG = LOW and the typical output delay is 20 ns

for each group of 8 outputs R, G, B. Eg: R1, G1, B1 has no delay, R2, G2, B2 has 20 ns

delay and R3, G3, B3, has 40 ns delay, etc.

7.2

Error detection condition

Note:

IO = the output current programmed by the REXT

IODEC = the detected output current in detection mode

Table 9.

Typical gradual delay time table

Delay time (ns) from ↓OExx

DG = 0

120

150

180

200

DG = 1

00000

Table 10.

Detection conditions (VDD = 3.3 to 5 V, IO = 20 mA, tA = 25 °C)

SW-1 Open

or SW-3b

Open line or output short

to GND detected

=> IODEC ≤ 0.4 x IO

No error

detected

=> IODEC ≥ 0.35 x IO

SW-2

Closed or

SW-3a

Short on LED or short to

V-LED detected

=> VO ≥ 2.6 V

No error

detected

=> VO ≤ 2.4 V

Table 11.

Typical current threshold values to detect LED open line

Iset (mA)

Rext (

Ω)

Typ. out current detection (mA)

3920

1.28

1960

2.45

980

7.4

386

241

STP24DP05 数据表(PDF) 15 Page - STMicroelectronics

STP24DP05 数据表(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

数据表下载