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STP24DP05 数据表(PDF) 18 Page - STMicroelectronics |
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STP24DP05 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 26 page ![]() Feature description STP24DP05 18/26 7.5 Phase three: “resuming to normal mode” In order to re-enter in normal mode either the LE\DML pin or the sequence showed in the following table and diagram can be used: Note: For proper device operation the "entering in detection" sequence must be followed by a "resume mode" sequence, it is not possible to insert consecutive equal sequence. 7.6 Shift registers data flow control The 8x3 shift registers have a default RGB sequence serial data flow as showed on block diagram Figure 2. The data can be redirected by DF0 and DF1 pins, these pins change the order of the data flow according to the following table: Table 13. SPI sequence to resume in normal mode - truth table CLK 1°2°3°4° 5° OE-R/DM H L HHH LE/DM LLLL L Table 14. Shifter register data flow control Sequence DF0 DF1 BGR 1 1 BGR 0 1 RGB 1 0 GBR 0 0 |
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