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VT5376 数据表(PDF) 19 Page - STMicroelectronics |
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VT5376 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 30 page ![]() VT5376 General features 19/30 7 General features 7.1 Device clocking The device integrates its own oscillator. It does not require an external Xtal or resonator, instead it requires only an external capacitor of 33 pF. The accuracy of this cap will determine the accuracy of the internal clock. Ignoring the capacitor accuracy, the frequency will be accurate within 10% range. 7.2 Battery level monitoring The device includes an 8-bit ADC that translates the VBAT voltage into an 8-bit value that can be read via I2C. The external MCU can upload this value and take any action required. 7.3 Resolution setting (counts/inch) Due to an accurate on-chip interpolation process, the device operates below the pixel resolution. This enables the user to easily select any desired resolution via a simple register write. Note: Different resolutions can be applied to X and Y. This could be useful in case of optical non-symmetry or distortion. 7.4 Image (frame) capture It is possible to capture an image and download it using a simple I2C write/read sequence. This is useful to calibrate optics during pre-production or to perform basic tests. In order to achieve this, the user must: 1. Put the firmware into IDLE by setting bit 7 of register 0x05 (fw_idle_state). 2. Disable the motion engine controller by clearing bit 1 of register 0x82 (timer_itr_enable). 3. Enable frame dump mode by setting bit 0 of register 0x62 (frame_dump_mode_enable). The VT5376 resets the sensor, enables the DCDC, runs a single frame sequence and stores it into an internal RAM. Once this process is complete, the VT5376 signals that the image is ready for download, by asserting bit 2 in register 0x62 (frame_ready_for_download). When this flag is asserted, the user can download the 400 consecutive pixels by reading register 0x61 (image) 400 consecutive times. When all the pixels have been read, the VT5376 signals the end of the process by setting bit 3 in register 0x62 (frame_upload_complete). To resume normal operation the user should reset bit 0 in register 0x62 to exit the frame dump mode, take the firmware out of Idle by resetting bit 7 of register 0x05 and set bit 1 of register 0x82 to enable the motion controller. |
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