L6722 datasheet(24/34 Pages) STMICROELECTRONICS

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9 Output voltage monitor and protections

L6722

24/34

9.5

PGOOD

It is an open-drain signal set free after the soft-start sequence has finished. It is pulled low

when the output voltage drops below -150mV of the programmed voltage.

9.6

Over-current protection

The Over Current threshold has to be programmed, by designing the RISENx resistors, to a safe

value, in order to be sure that the device doesn't enter OCP during normal operations. This

value must take into consideration also the process spread and temperature variations of the

sensing elements as well as the minimum value IOCTH(min) of the threshold as follow:

where IOCPx is the current measured by the current reading circuitry when the device enters

Quasi-Constant-Current.

Since the device reads the current across Low Side mosfets, it limits the bottom of the inductor

current entering in constant current until setting UVP as below explained. IOCPx must be

calculated starting from the corresponding output current value IOUT(OCP) as follow since the

device holds the valley current information:

where IOUT(OCP) is still the output current value at which the device enters Quasi-Constant-

Current, and IPP is the inductor current ripple in each phase. In particular, since the device

limits the valley of the inductor current, the ripple entity, when not negligible, impacts on the real

OC threshold value and must be considered.

The device detects an Over Current condition for each phase when the current information

IISENx overcomes the fixed threshold of IOCTH. When this happens, the device keeps the

relative LS mosfet on, also skipping clock cycles, until the threshold is crossed back and IISENx

results being lower than the IOCTH threshold (this implies that the device limits the bottom of

each inductor current ripple). After exiting the OC condition, the LS mosfet is turned off and the

HS is turned on with a duty cycle driven by the PWM comparator.

Keeping the LS on, skipping clock cycles, causes the on-time subsequent to the exit from the

OC condition, driven by the control loop, to increase. The device enters in Quasi-Constant-

Current operation: the low-side mosfets stays ON until the current read becomes lower than

IOCPx (IINFOx < IOCTH) skipping clock cycles. The high side mosfet can be then turned ON with

a TON imposed by the control loop after the LS turn-off and the device works in the usual way

until another OCP event is detected.

This means that the average current delivered can slightly increase in Quasi-Constant-Current

operation since the current ripple increases. In fact, the ON time increases due to the OFF time

rise because of the current has to reach the IOCPx bottom. The worst-case condition is when

the ON time reaches its maximum value.

When this happens, the device works in Real Constant Current and the output voltage

decrease as the load increase. Crossing the UVP threshold causes the device to latch driving

high the OSC pin.

It can be observed that the peak current (IPEAK) is greater than IOCPx but it can be determined

as follow:

OCPx max

()

dsON max

()

⋅

OCTH min

()

---------------------------------------------------------------------

OCPx

OUT OCP

()

----------------------------

∆I

------------

–

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