Application information

TS472

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5.7

Standby mode

When the standby command is set, the time required to set the output stages (differential

outputs and 2.0V bias output) in high impedance and the internal circuitry in shutdown mode

5.8

Layout considerations

The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply

rejection and low noise performance, it is mandatory that the layout track to these

component is as short as possible.

In addition, the capacitor location for the dedicated pin should be as close to the device as

possible.

5.9

Single-ended input configuration

It’s possible to use the TS472 in a single-ended input configuration. The schematic in

Figure 39 provides an example of this configuration.

Figure 39.

Single ended input typical application

VCC

Electret Mic

Rpos

Standby Control

Positive Output

Negative Output

1uF

Cb

1uF

Cs

1uF

C3

C1

C2

Cin+

Cin-

+

Cout+

Cout-

Rout+

Rout-

Bias

IN-

IN+

G

OUT+

OUT-

GAIN

BYPASS

BIAS

Vcc

SELECT

C2

D2

B2

D1

A2

B1

A1

2.0V

U1

TS472

Optional