Data Brief

For further information contact your local STMicroelectronics sales office.

September 2008

Rev 2

1/9

9

STi7101

Low-cost HDTV set-top box decoder for H.264

Features

ST40 CPU core: 266 MHz

MPEG-2

Description

The STi7101 is a new generation, high-definition

set-top box / DVD decoder chip, that provides

very high performance for low-cost HD systems.

The STi7101 includes both MPEG2 and H.264

video decoders.

32

CP

ST40 core 266 MHz

UDI

16 K Icache

MMU

Int. control

32 K Dcache

LMI

Digital

video input

DEI

S/PDIF

2-ch

PCM in

SD

video in

TMDS main video

DENC

3x

SSCs

4x

UARTs

ILC

2x I/F

SmCard

6x GPIO

PWM

MAFE

interface

IR

Tx/Rx

STBus

Main video

display

FDMA

AudioL

TSmerger/router

Display

compositor

2D gamma

blitter

DACs

DVI-HDCP

HDMI

Output stage

Main video

output (HD)

YPbPr

Aux video

output (SD)

YC/CVBS

USB

AudioR

2 x PDES

Clock

generator

5 x 2-ch

PCM out

Peripheral I/O

and external interrupts

TSIN0

NRSS-A

TSIN1 TS I/O

and system

services

DACs

CUR

3 x GDP

Aux video

display

Audio decoder

and interfaces

Audio

DACs

PTI

output (HD)

Video decoder

H264/MPEG-2

2.0

Serial

ATA

interface

LMI

32

SDRAM

DDR

Video

System

ST231

core

ST231

core

Ethernet,

MII/RMII

MII/RMII for 100BT

Ethernet

EMI

Flash

or companion chip

EMPI

PTI

Digital

video

output

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