I²C bus selection

STV6412B

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3

I²C bus selection

Data transfers follow the usual I²C format; that is, after the start condition (S), a 7-bit slave

address is sent, followed by an eighth bit (W) that determines whether the data direction is

Read (W=1) or Write (W=0). An 8-bit sub-address is sent to select a register, followed by an

8-bit data word to be included in the register. The IC’s I²C bus decoder enables the

automatic incrementation mode in write mode.

The circuit operates at clock frequencies of up to 400 kHz.

Table 13.

String format

Write only mode (S = Start condition, P = Stop condition, A = Acknowledge)

Table 14.

Read only mode

Table 15.

Slave address

Table 16.

Auto increment mode

3.1

I²C bus addresses

Write address: 1001 01X0, read address: 1001 01X1

Address selection pin grounded: X = 0, write address = 94(hex), read address = 95(hex)

Address selection pin to supply: X = 1, write address = 96(hex), read address = 97(hex)

S

SLAVE ADDRESS

0

A

SUB-ADDRESS

A

DATA

A

P

S

SLAVE ADDRESS

1

A

DATA

A

P

Address

A6A5A4

A3A2A1A0

Value

1

00101

X

S SLAVE ADDRESS 0

A SUB-ADDRESS A DATA0 A

DATA1

A

....

DATAn

A

P

Sub-address

Sub-address +1 Sub-address + N

Table 17.

Input signal summary (write mode)

Reg

Addr

(Hex)

Data

d7

d6

d5

d4

d3

d2

d1

d0

Audio

00h

TV stereo

mono

TV 0/6 dB

TV volume-62 dB to 0 dB - 2 dB steps

Soft

volume

mode

01h

VCR stereo

mono

Not used

(see Note 1)

VCR audio

switch control

CINCH

audio gain

TV/CINCH audio switch control