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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STV82X7 数据表(PDF) 87 Page - STMicroelectronics |
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STV82X7 数据表(HTML) 87 Page - STMicroelectronics |
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87 / 156 page  87/156 STV82x7 Register List I2S_IN_CONFIG I²S Configuration Register AV_DELAY Audio/Video Delay Register Address: 86h Type: R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 LOCK_MODE _EN 0 SYNC LRCLK_START LRCLK_ POLARITY SCLK_ POLARITY DATA_CFG I2S_MODE Bit Name Reset Function LOCK_MODE_EN 1 0: Disable Lock Mode for external I2S input 1: Enable Lock Mode for external I2S input Bit 6 0 Reserved. SYNC 0 I2S synchronisation: 0: Capture directly 1: Wait for synchro LRCLK_START 0 according to LRCLK POLARITY, first data take: 0: Left 1: Right LRCLK_POLARITY 0 Polarity of the left data SCLK_POLARITY 1 0: Falling edge 1: Rising edge DATA_CFG 1 0: LSB First 1: MSB First I2S_MODE 0 0: Non standard mode 1: Standard mode (Refer to Figure 29) Address: 89h Type: R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DELAY_TIME DELAY_ON Bit Name Reset Function DELAY_TIME 0000000 Audio Delay Time (see Table 19) 0000000: 0 ms ... 0111100: 60 ms (48 kHz) ... 1011010: 90 ms (32 kHz) DELAY_ON 0 Audio/video delay is enabled when set. |
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