STw4102

Battery monitoring

23/34

approximately 250 microseconds must be respected between the time the RD_REQ bit is

set and the actual register reading. The RD_REQ bit is automatically cleared after the

transfer.

A high value written to the RST_CHRG, RST_DCHRG or RST_COUNTER bits of the

control register resets respectively the charge accumulator, discharge accumulator or

conversion counter. If these bits are set together with the RD_REQ bit, then the reset occurs

after the transfer to the charge, discharge or conversion counter register respectively. The

RST_CHRG, RST_DCHRG or RST_COUNTER bits are automatically cleared after the

reset.

The differential inputs are scaled to the full range of the AD converter, introducing a small

offset error. A high value written to the CG_CAL bit of the control register connects the

inputs of the AD converter together, allowing the DBB to measure the digital offset error.

Using this measurement, the gas gauge can be calibrated to reduce the offset error.

Using the 32.768kHz RTC clock, the conversion cycle time is 250 ms. The LSB value is

23.54 µV, which corresponds to a current of 784.7 µA with a typical 30 m

Ω sense resistor.

Given a 250 ms conversion cycle time, this LSB value corresponds to a charge of 54.5 nAh.

Under these conditions, the 24-bit accumulator has a capacity of 914 mAh.

The gas gauge system is disabled when the battery voltage is below the Power On Reset

threshold (2.7 V), or when the RESETN pin is driven low (CG_ENA bit default value is 0).

During normal operation, either the STDBY pin or the CG_ENA bit can be used to disable

the gas gauge function. When the STDBY pin is low, the gas gauge is disabled without

waiting for the end of the current conversion. When the CG_ENA bit is low, the current

gauge is disabled at the end of the current conversion.

8.2

Battery voltage monitoring

The battery voltage can be measured by means of a 7- or 12-bit A/D converter. This function

is enabled and configured using the following bits of the ADCTRL register:

●

The ADPOWERON bit enables battery voltage monitoring.

●

The ADRESOLUTION bit allows to select 7- or 12-bit conversion.

●

The ONSTATE bit is set when the ADC converter is ready.

●

The ADSTART bit starts a conversion; it is automatically cleared after writing.

●

The ADRUN bit indicates that a conversion is in progress. The result is available when

the ADRUN bit goes low, and it can be read in the ADDATA registers.

A high value written to the ADCAL bit of the control register connects the input of the A/D

converter to ground, allowing the DBB to measure the digital offset error. Using this

measurement, the AD converter can be calibrated to reduce the offset error.

32.768kHz RTC clock, the conversion cycle time is 7.8 (250) ms. LSB value is 45 (1.4) mV.

When the battery voltage falls below the Power On Reset threshold, or when the RESETN

input is driven low, the battery voltage monitoring function is disabled.