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STW4102 数据表(PDF) 25 Page - STMicroelectronics |
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STW4102 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 34 page ![]() STw4102 I2C interface 25/34 10 I2C interface 10.1 Read and write operations The I2C interface is used to control the charging and the gas gauge system. It is compatible with the I2C specification of Philips (version 2.1). It is a slave serial interface with a serial data line (SDA) and a serial clock line (SCL): SCL: input clock used to shift data SDA: input/output bi-directional data transfers A filter rejects the potential spikes on the bus data line to preserve data integrity. The bi- directional data line supports transfers up to 400 kbit/s (fast-mode). The data is shifted into and from the chip on the SDA line, MSB first. The first bit must be high (START), followed by the Device ID and Read/Write control bit (see Table 15). The AddrID0 to AddrID2 bits are factory programmable, their default ID value is 70h (AddrID0 = AddrID1 = AddrID2 = 0). Then, the STw4102 sends an acknowledge at the end of the 8-bit transmission. The next 8 bits correspond to the address register, followed by another acknowledge. Table 16 shows the address register format. The data field is sent last. It can be composed of several 8-bit data registers, each followed by an acknowledge. Table 17 shows the data register format. The STw4102 supports byte read, word read, block read, and byte write operations. The transmission protocol is summarized in Figure 24 and Figure 25. r Figure 24. Byte, word and block read operation Table 15. Device ID and R/W bit format b7 b6 b5 b4 b3 b2 b1 b0 1 1 1 0 AddrID2 AddrID1 AddrID0 R/W Table 16. Address register format b7 b6 b5 b4 b3 b2 b1 b0 RegAddr7 RegAddr6 RegAddr5 RegAddr4 RegAddr3 RegAddr2 RegAddr1 RegAddr0 Table 17. Data register format b7 b6 b5 b4 b3 b2 b1 b0 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 Start bit = SDAfalling when SCL=1 Stop bit = SDArising when SCL=1 Restart bit = start after a start Acknowledge = SDA force low during a SCL clock Start Device id Reg address 8bits A Restart Device id R A Reg data 8bits A Reg data 8bits A Reg data 8bits A/A address 7 bits 7 bits n+1 address n+2 Stop A W Master Slave <-- byte read --> <-- word read (2 bytes) ----------> <-- block read (up to 10 bytes) ----------------------> |
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