STW5098 datasheet(23/86 Pages) STMICROELECTRONICS

23 / 86 page

Functional description

STw5098

22/85

affects the interface format inverting the polarity of CK pin. Bit SYNCP (ADSYNCP and

DASYNCP) switches between delayed (SYNCP=0) and non delayed (SYNCP=1)

formats.

DSP format is suited to interface with a multi-channel serial port.

●

SPI format (DAFORM or ADFORM =100) in this format left and right data is received

with separate data burst. Every burst is identified with a low level on SYNC signal

(

Figure 10 on page 55). There is no timing difference between the left and right data

burst: the two channels are identified by the startup order: the first burst after AD path

or DA path power-up identifies the left channel data, the second one is the Right

channel data, then left and right data repeat one after the other. CK must have 16

periods per channel in case of 16 bit data word and 32 periods per channel in case of

18 bit to 32 bit data word.

The SPI interface can be configured as a single-channel (mono) interface with bit SPIM

(ADSPIM and DASPIM). The mono interface always exchanges the left channel

sample.

SPI-format can only be slave: if Master Mode is selected the CK and SYNC pins are set

to 0. Bit CKP (ADCKP and DACKP) affects the interface format inverting the polarity of

CK pin.

●

PCM format (DAFORM or ADFORM =111): this format is monophonic, as it can only

receive (DA) and transmit (AD) single channel data (

Figure 10 on page 55). It is mainly

used when voice filters are selected. If audio filters are used then the same sample is

sent from DA-PCM interface to both channel of DA path, and the left channel sample

from AD path is sent to AD-PCM interface. If in the AD path the right channel has to be

sent to the PCM interface then the following must be set: ADRTOL=1 (CR27) and

ENADCR=0 (CR1). In Master Mode the number of CK periods per SYNC period is

between 16 and 512 (see DAPCMF in CR22 and ADPCMF in CR25

Section 4.7 on

page 20 for details). Bit CKP (ADCKP and DACKP) affects the interface format

inverting the polarity of CK pin. Bit SYNCP (ADSYNCP and DASYNCP) switches

between delayed (SYNCP=0) and non delayed (SYNCP=1) formats.

4.9

Analog inputs

Each entity of the STw5098 has a stereo Microphone preamplifier and a stereo Line In

amplifier, with inputs selectable among 5: MIC (for Microphone preamplifiers only), LINEIN

(for Line In amplifiers only) and 3 different AUX inputs (for Microphone and Line In

amplifiers). The AUX inputs can be used simultaneously for Line In amplifiers and

Microphone preamplifiers.

The following description is for one entity, it is similar for the other entity.

●

Microphone preamplifier: it has a very low noise input, specifically designed for low

amplitude signals. For this reason the preamplifier has a high input gain (up to 39 dB)

keeping a constant 50 k

Ω input impedance for the whole gain range. However it can

also be used as line in preamplifier because it can accept a high dynamic input signal

(up to 4 Vpp). There are two separate gain and attenuation stages in order to improve

the S/N ratio when the preamplifier output range is below full scale (volume

control).The gain and attenuation controls are separate for left and right channel (CR3

and CR4 respectively). The Preamplifier input is selected with bits MICSEL in CR18,

and it is disconnected when MICMUTE=1. If a single ended input is selected then the

preamplifier uses the selected pin as the positive input and connects the negative input

(for both left and right channels) to CAPMIC pin, which has to be connected through a

capacitor to a low noise ground (typically the same reference ground of the input).

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