ADA4857-1/ADA4857-2

Rev. 0 | Page 13 of 20

PHASE

GAIN

–10

0

10

20

30

40

50

60

70

0.1

–180

–160

–140

–120

–100

–80

–60

–40

–20

0

1

10

100

1000

FREQUENCY (MHz)

Figure 32. Open-Loop Gain and Phase vs. Frequency

TIME (40ns/DIV)

8

–8

6

–6

–4

4

–2

0

2

OUTPUT

OUTPUT

INPUT

G = +1

Figure 33. Input Overdrive Recovery for Various Resistive Loads

–30

–20

–10

0

10

–80

–70

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

–PSRR

+PSRR

Figure 34. Power Supply Rejection Ratio (PSRR) vs. Frequency

SOIC

LFCSP

–30

–20

–10

0

–100

–70

–80

–90

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

G = +2

PD = 3V

Figure 35. PD Isolation vs. Frequency

TIME (200ns/DIV)

8

–8

6

–6

–4

4

–2

0

2

OUTPUT

OUTPUT

2 × INPUT

G = +2

Figure 36. Output Overdrive Recovery for Various Resistive Loads

–30

–90

–80

–70

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

Figure 37. Common-Mode Rejection Ratio (CMRR) vs. Frequency