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LM3421 数据表(PDF) 2 Page - National Semiconductor (TI) |
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LM3421 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 24 page ![]() Connection Diagrams Top View 30067304 16-Lead TSSOP EP NS Package Number MXA16A Top View 30067366 20-Lead TSSOP EP NS Package Number MXA20A Ordering Information Order Number Spec. Package Type NSC Package Drawing Supplied As LM3421MH NOPB TSSOP-16 EP MXA16A 92 Units, Rail LM3421MHX NOPB TSSOP-16 EP MXA16A 2500 Units, Tape and Reel LM3423MH NOPB TSSOP-20 EP MXA20A 73 Units, Rail LM3423MHX NOPB TSSOP-20 EP MXA20A 2500 Units, Tape and Reel Pin Descriptions LM3423 LM3421 Name Function 1 1 V IN Power supply input (4.5V-75V). Bypass with 100nF capacitor to AGND as close to the device as possible in the circuit board layout. 2 2 EN Enable: Pull to ground for zero current shutdown. Tie directly to V IN for automatic startup at 4.1V. 3 3 COMP Compensation: PWM controller error amplifier compensation pin. This pin connects through a series resistor-capacitor network to AGND. 4 4 CSH Current Sense High: Output of the high side sense amplifier and input to the main regulation loop error amplifier. 5 5 RCT Resistor Capacitor Timing: External RC network sets the predictive “off-time” and thus the switching frequency. The RC network should be placed as close to the device as possible in the circuit board layout. 6 6 AGND Analog Ground: The proper place to connect the compensation and timing capacitor returns. This pin should be connected via the circuit board to the PGND pin through the EP copper circuit board pad. 7 7 OVP Over-Voltage Protection sense input: 1.24V threshold with hysteresis that is user programmable by the selection of the OVP Over-Voltage Lock-Out (OVLO) resistor divider network. 8 8 nDIM Not DIM input: Dual function pin. Primarily used as the Pulse Width Modulation (PWM) input. When driven with a resistor divider from V IN, this pin also functions as a user programmable V IN Under-Voltage Lock-Out (UVLO) with 1.24V threshold and programmable hysteresis by the UVLO resistor divider network. The PWM and UVLO functions can be performed simultaneously. 9 - FLT Fault flag: This is an N-channel MOSFET open drain output. The FLT pin transitions to the high (open) state once the Fault Timer has timed out and latched the controller off. www.national.com 2 |
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