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STPCE1EDBC 数据表(PDF) 41 Page - STMicroelectronics |
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STPCE1EDBC 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 87 page  ELECTRICAL SPECIFICATIONS Release 1.3 - January 29, 2002 41/87 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 4.5.4. PCI INTERFACE Table 4-9 lists the AC characteristics of the PCI in- terface. Table 4-9. PCI Bus AC Timing Name Parameter Min Max Unit PCI_CLKI to AD[31:0] valid - 9.3 ns PCI_CLKI to FRAME valid - 7.14 ns PCI_CLKI to CBE[3:0] valid - 7.94 ns PCI_CLKI to PAR valid - 9.34 ns PCI_CLKI to TRDY valid - 8.8 ns PCI_CLKI to IRDY valid - 7.74 ns PCI_CLKI to STOP valid - 9.4 ns PCI_CLKI to DEVSEL valid - 8.5 ns PCI_CLKI to PCI_GNT valid - 7.14 ns AD[31:0] bus setup to PCI_CLKI 5.42 ns FRAME setup to PCI_CLKI 5.03 ns CBE[3:0] setup to PCI_CLKI 6.37 ns IRDY setup to PCI_CLKI 4.52 ns PCI_REQ[2:0] setup to PCI_CLKI 5.29 ns AD[31:0] bus hold from PCI_CLKI -0.91 ns FRAME hold from PCI_CLKI -1.8 ns CBE[3:0] hold to PCI_CLKI -2.9 ns IRDY hold to PCI_CLKI -1.6 ns PCI_REQ[2:0] hold from PCI_CLKI -3.49 ns |
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