VIPER28 datasheet(24/29 Pages) STMICROELECTRONICS

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Operation descriptions

VIPER28

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7.11

Burst-mode operation at no load or very light load

When the load decrease the feedback loop reacts lowering the feedback pin voltage. As the

voltage reach the burst mode threshold VFBbm MOSFET stops switching. After the MOSFET

stops, as a result of the feedback reaction to the energy delivery stop, the feedback pin

voltage increases and exceeding VFBbm threshold of 100 mV, the burst mode hysteresis

typical value MOSFET the power device start switching again. Figure 26 shows this

behavior called burst mode. Systems alternates period of time where power MOSFET is

switching to period of time where power MOSFET is not switching. The power delivered to

output during switching periods exceeds the load power demands; the excess of power is

balanced from not switching period where no power is processed. The advantage of burst

mode operation is an average switching frequency much lower then the normal operation

working frequency, up to some hundred of hertz, minimizing all frequency related losses.

During the burst mode operation the drain current is limited to ID_BM, 160 mA typ. value

Figure 26. Burst mode timing diagram, light load management

7.12

Extra power management function (EPT)

Some applications need an extra power for a limited time window during which the converter

regulation has to be guaranteed. The extra power management function allows to design a

converter that can satisfy this request and is provided by the EPT pin, see Table 8 on

page 9

This function requires the use of a capacitor on EPT pin (CEPT) that is charged or

discharged by means of a 5 µA current cycle by cycle. When the drain current raises over

85% of Idlim value, see IDLIM_EPT (Table8 on page8), the current generator charges CEPT

while when the drain current is below IDLIM_EPT discharges the capacitor. If CEPT ‘s voltage

reaches the VEPT threshold (typical, 4 V), the converter is shut down.

After the converter shut down, the VDD voltage will drop below the VDD(ON) start up

threshold (typ. 14.5 V) and according to the auto restart operation (see section 7.5) the VDD

pin voltage have to fall below the VDD(RESTART) threshold (typical, 4.5V) in order to charge

again the VDD capacitor. Moreover the PWM operation is enabled again only when the

voltage on EPT pin, drop below the VEPT(RESTART) (typical, 0.6V). The low CEPT discharge

current in combination with its low restart threshold, ensures safe operations and avoids

I DS

VFBBM

50 mV

hyster.

Burst-mode

Normal-mode

50 mV

hyster.

Burst-mode

Normal-mode

100

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