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M34D64WMN6TP 数据表(PDF) 22 Page - STMicroelectronics |
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M34D64WMN6TP 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 27 page ![]() DC and AC parameters M34D64-W 22/27 Table 11. AC characteristics Test conditions specified in Table 8.: AC measurement conditions and Table 7.: Operating conditions Symbol Alt. Parameter Min. Max. Unit fC fSCL Clock frequency 400 kHz tCHCL tHIGH Clock pulse width high 600 ns tCLCH tLOW Clock pulse width low 1300 ns tCH1CH2 tR Clock rise time 300 ns tCL1CL2 tF Clock fall time 300 ns tDH1DH2 (1) 1. Sampled only, not 100% tested. tR SDA rise time 20 300 ns tDL1DL2 (1) tF SDA fall time 20 300 ns tDXCX tSU:DAT Data in setup time 100 ns tCLDX tHD:DAT Data in hold time 0 ns tCLQX tDH Data out hold time 200 ns tCLQV (2) 2. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA. tAA Clock low to next data valid (access time) 200 900 ns tCHDX (3) 3. For a reStart condition, or following a Write cycle. tSU:STA Start condition setup time 600 ns tDLCL tHD:STA Start condition hold time 600 ns tCHDH tSU:STO Stop condition setup time 600 ns tDHDL tBUF Time between Stop condition and next Start condition 1300 ns tW tWR Write time 5 ms |
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