Typical system block diagram

L6599

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Typical system block diagram

Figure 2.

Typical system block diagram

11

LVG

Low-side gate-drive output. The driver is capable of 0.3A min. source and 0.8A min. sink

peak current to drive the lower MOSFET of the half-bridge leg. The pin is actively pulled to

GND during UVLO.

12

Supply Voltage of both the signal part of the IC and the low-side gate driver. Sometimes a

small bypass capacitor (0.1µF typ.) to GND might be useful to get a clean bias voltage for

the signal part of the IC.

13

N.C.

High-voltage spacer. The pin is not internally connected to isolate the high-voltage pin and

ease compliance with safety regulations (creepage distance) on the PCB.

14

OUT

High-side gate-drive floating ground. Current return for the high-side gate-drive current.

Layout carefully the connection of this pin to avoid too large spikes below ground.

15

HVG

High-side floating gate-drive output. The driver is capable of 0.3A min. source and 0.8A min.

sink peak current to drive the upper MOSFET of the half-bridge leg. A resistor internally

connected to pin 14 (OUT) ensures that the pin is not floating during UVLO.

16

VBOOT

High-side gate-drive floating supply Voltage. The bootstrap capacitor connected between

this pin and pin 14 (OUT) is fed by an internal synchronous bootstrap diode driven in-phase

with the low-side gate-drive. This patented structure replaces the normally used external

diode.

Table 1.

Pin functions