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M38039G8HKP 数据表(PDF) 20 Page - Renesas Technology Corp |
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M38039G8HKP 数据表(HTML) 20 Page - Renesas Technology Corp |
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20 / 92 page ![]() Rev.1.10 Nov 14, 2005 Page 20 of 91 REJ03B0166-0110 3803 Group (Spec.H QzROM version) PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. Fig 14. Port block diagram (3) (18) Port P56 (15) Port P52 (16) Port P53 (17) Ports P54, P55 CNTR Interrupt input Pull-up control bit Data bus Port latch Direction register PWM output PWM function enable bit Pull-up control bit Data bus Port latch Direction register Serial I/O2 clock output Pull-up control bit Data bus Port latch Direction register Serial I/O2 port selection bit Serial I/O2 synchronous clock selection bit Serial I/O2 external clock input Serial I/O2 ready output Pull-up control bit Data bus Port latch Direction register SRDY2 output enable bit Pulse output mode Timer output |
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