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HD74LS73AP 数据表(PDF) 4 Page - Renesas Technology Corp |
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HD74LS73AP 数据表(HTML) 4 Page - Renesas Technology Corp |
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4 / 7 page ![]() HD74LS73A Rev.3.00, Jul.22.2005, page 4 of 6 Testing Method Test Circuit 1. ƒ max, tPLH, tPHL, (Clock→Q, Q) 4.5V VCC CK Output Q Output Q Input J K Q Q CLR P.G. Zout=50 Ω Same as Load Circuit 1. RL Load circuit 1 CL Notes: 1. Test is put into the each flip-flop. 2. CL includes probe and jig capacitance. 3. All diodes are 1S2074(H). 2. tPHL (Clear→Q), tPLH (Clear→Q) Input P.G. Zout=50 Ω 4.5V VCC CK Output Q Output Q Input J K Q Q CLR P.G. Zout=50 Ω Same as Load Circuit 1. RL Load circuit 1 CL Notes: 1. Test is put into the each flip-flop. 2. CL includes probe and jig capacitance. 3. All diodes are 1S2074(H). |
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