STV0196 datasheet(10/23 Pages) STMICROELECTRONICS

10 / 23 page

V - CARRIER RECOVERY ; DEROTATOR

The input of the circuit is a pair of demodulated

signals ; however, there may subsist some phase

error not corrected by the front end loop.

Furthermore, the demodulation may be done at

constant frequency; the tuner is trimmed in order

to make the useful signal bandwidth centered on

this demodulation frequency ; in that case, a carrier

offset frequencymay subsist; it is fixed by the mean

of the on-chip derotator which acts as a fine tuning

carrier loop.

The derotator frequency range is limited to an

interval corresponding to

±Fs/16.

V.1 - Loop Parameters

Like the timing loop, the carrier loop is a second

order system where two parameters

α and β may

be programmed respectively with alpha_car and

beta_car.

Carrier Loop Parameter Registers

Internal Address : Hex0E

10100011

alpha_carrier

beta_carrier

Derotator Frequency Register

Internal Address : Hex0F

Signed number

This 8 bit R/W register may be written at any time

to force the central frequency of the derotator to

start the carrier research, or read, when the loop is

locked,in order to know the current carrier offset

(one LSB correspond to Fs/2048).

V.2 - Loop Equations

The natural pulsation is :

ωn = 10−3 ⋅ fs ⋅

√

⋅ 2beta_car

and the damping factor is :

ξ= 0.128 ⋅ 2alpha_car ⋅

√

beta_car

where m is the reference value (see AGC registers).

The next table gives for the nominal amplitude

m = 24 the natural period (in symbols), and the

damping factor for the possible values of alpha_car.

As an example, the corresponding natural frequency

is given assuming a symbol frequency of 20MBauds.

The shaded area correspond to the reset values.

beta_car

(reg. value)

Tn =2

π/ωn

(symb per)

907

642

454

321

227

160

113

fn (kHz) for

F = 20Mbd

125

177

alpha_car

(reg. value)

Damping Factor

NANA

NANANA

0.89

0.63

0.44 0.31 0.22 0.16 0.11

1.77

1.25

0.89 0.63 0.44 0.31 0.22

3.54

2.51

1.77 1.25 0.89 0.63 0.44

7.09

5.01

3.54 2.51 1.77 1.25 0.89

NA 14.18 10.03 7.09 5.01 3.54 2.51 1.77

VI - CARRIER OFFSET EVALUATOR

An 8 bit register may be read at any time; it gives

a signed value proportionnal to the carrier fre-

quency offset according to the expression :

∆f = 1.8 . 10-6 .m2 .N . Fs (in mode A)

where Fs is the symbol frequency, m the symbol

module (AGC reference), N the read value.

The maximum value for N is reached in nominal

conditions for a carrier offset of 16% of Fs ;if

greater, N remains saturated, giving a reliable sign

indication over more than

±50% Fs range.

Carrier Offset Register

Internal Address : Hex10

Signed number

VI.1 - Lock Indicator

This 1 bit Carrier Found flag may be read (see

Viterbi Status register) at any time ; it indicates that

a QPSK signal is found, and that the carrier loop is

closed ; This flag allows to detect false lock that can

happen if the loop bandwidth is small regarding the

frequency offset.

VII - CARRIER TO NOISE INDICATOR

Internal Address : Hex14. Read only register.

This register can be used to estimate the carrier to

noise level (Eb/No) in a range from 4 to 16dB.

The register value dependson both the AGC refer-

ence level ”m” (see paragraph VIII) and the control

bits ”SN[1..0]” (see paragraph IX). For more details

about how to use this register, please refer to the

Annexe 1.

FUNCTIONAL DESCRIPTION (continued)

STV0196B

10/23

STV0196 数据表(PDF) 10 Page - STMicroelectronics

STV0196 数据表(HTML) 10 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

数据表下载