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STV0299B 数据表(PDF) 21 Page - STMicroelectronics |
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STV0299B 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 36 page ![]() STV0299B 5REGISTER LIST (continued) 21/36 DAC REGISTERS (refer to Section 4.1.11 on page 10) DACR1 (MSB) 06 A2 [7:5] DAC Mode This field controls the DAC: 000: Functions as output port. The DAC output permanently 0. 001: Functions as output port. DAC output permanently 1. 010: High impedance mode. 100: Functions as DAC. Duty cycle modulated at fCLK/16. 101: Functions as DAC. Duty cycle modulated at fCLK/4. 110: Functions as DAC. Duty cycle modulated at fCLK. Other: Reserved functions. 4 This bit must be programmed to zero. [3:0] DAC: 4 MSB DACR2 (LSB) 07 00 [7:0] DAC: 8 LSB DISEQC AND LOCK CONTROL REGISTER (refer to Section 4.1.12 on page 10) DiSEqC 08 60 [7:6] Lock Output 00: 0 01: 1 10: CF 11: LK 5 Lock Configuration 1: Open drain 0: Push-pull [4:3] These bits must be programmed to zero. 2 DiSEqC/Unmodulated Burst [1:0] DiSEqC Mode DISEQC FIFO (refer to Section 4.1.12 on page 10) DiSEqC FIFO 09 00 [7:0] FIFO byte DISEQC STATUS (refer to Section 4.1.12 on page 10) DiSEqC Status 0A R0 7 Input Port: This bit gives the input level on the pin IP0. It is an input port for general use purposes. 6 SDAT Input State [5:2] Not relevant. 1 FIFO empty 0 FIFO full RESERVED 0B Reserved Name HEX Address Reset Value Bit Position Signal Description |
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