FUNCTIONAL DESCRIPTION

The STV9420/21 display processor operation is

controlled by a host MCU via the I

fully programmable through 8 internal read/write

registers (12 for STV9421) and performs all the

display functions by generating pixels from data

stored in its internal memory. After the page down-

loading from the MCU, the STV9420/21 refreshes

screen by its built in processor, without any MCU

control (access).In addition, the host MCU has a

direct access to the on chip 1Kbytes RAM during

the display of the current page to make any update

of its contents.

With the STV9420/21, a page displayed on the

screen is made of several strips which can be of 2

types : spacing or character and which are de-

scribed by a table of descriptors and character

codes in RAM. Several pages can be downloaded

at the same time in the RAM and the choice of the

current display page is made by programming the

CONTROL register.

I - Serial Interface

The 2-wires serial interface is an I

be connected to the I

sl ave ad dr ess ; the sla ve address of t he

STV9420/21 is BA (in hexadecimal).

A6

A5

A4

A3

A2

A1

A0

R/W

10111

01

I.1 - Data Transfer in Write Mode

The host MCU can write data into the STV9420/21

registers or RAM.

To write data into the STV9420/21, after a start, the

MCU must send (Figure 3) :

- First, the I

for the R/W bit,

- The two bytes of the internal address where the

MCU wants to write data(s),

- The successive bytes of data(s).

All bytes are sent MS bit first and the write data

transfer is closed by a stop.

I.2 - Data Transfer in Read Mode

The host MCU can read data from the STV9420/21

registers, RAM or ROM.

To read data from the STV9420/21 (Figure 4), the

MCU must send 2 different I

The first one is made of I

R/W bit at low level and the 2 internal address

bytes.

The second one is made of I

with R/W bit at high level and all the successive

data bytes read at successive addresses starting

from the initial address given by the first sequence.

SCL

SDA

R/W

A7

A6

A5

A4

A3

A2

A1

A0

ACK

LSB Address

ACK

MSB Address

ACK

Start

-

-

A13 A12 A10 A10 A9

A8

Stop

SCL

SDA

R/W

D7

D6

D5

D4

D3

D2

D1

D0

ACK

ACK

Data Byte n

ACK

Start

D7

D6

D5

D4

D3

D2

D1

D0

Stop

Data Byte 1

Figure 4 : STV9420/I

SCL

SDA

R/W

A7

A6

A5

A4

A3

A2

A1

A0

-

-

A13

A12

A11

A10

A9

A8

ACK

LSB Address

ACK

MSB Address

ACK

Start

D7

D6

D5

D4

D3

D2

D1

D0

D7

D6

D5

D4

D3

D2

D1

D0

D7

D6

D5

D4

D3

D2

D1

D0

ACK

ACK

Data Byte 1

Data Byte 2

ACK

Data Byte n

Stop

SCL

SDA

Figure 3 : STV9420/I

STV9420 - STV9421

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