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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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M35074 数据表(PDF) 5 Page - Renesas Technology Corp |
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M35074 数据表(HTML) 5 Page - Renesas Technology Corp |
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5 / 44 page  MITSUBISHI MICROCOMPUTERS M35074-XXXSP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 4 Address 00016 00116 DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 0 C7 C6 C5 0 C7 C6 C5 DA17 DA16 DA15 DA14 DA13 DA12 DA11 DA10 C8 C8 CC6 CC5 CC4 CC3 CC2 CC1 CC0 CC6 CC5 CC4 CC3 CC2 CC1 CC0 BC6 BC5 BC4 BC3 BC2 BC1 BC0 BC6 BC5 BC4 BC3 BC2 BC1 BC0 DA4 DA3 DA2 DA1 DA0 C4 C3 C2 C1 C0 C4 C3 C2 C1 C0 Character code Character color Background color 11E16 11F16 12016 12116 12216 12316 12416 12516 0 0 VP10 VP9 VP8 VP7 VP6 SYAD BC6 BC5 BC4 BC6 BC5 BC4 EXCK0 EXCK1 BEAT14 12616 12716 12816 HSZ21 HSZ20 PTD7 PTD6 PTD5 PTD4 PTD3 VP5 VP4 VP3 VP2 VP1 VP0 DSP11 VSZ2H1 VSZH02 LIN17 LIN16 LIN15 LIN14 LIN13 HSZ11 HSZ10 TEST19 BLK1 BLK0 BCOL CC6 CC5 CC4 CC3 CC2 CC6 CC5 CC4 CC3 CC2 BC3 BC2 BC1 BC0 BC3 BC2 BC1 BC0 DIV11 DIVS0 DIVS1 DIVS2 TEST24 RSEL0 RSEL1 HP11 FC6 FC5 FC4 FC3 TEST20 SPACE2 SPACE1 TEST11 TEST12 C7 C6 C5 C4 C3 C7 C6 C5 C4 C3 DIV10 DIV9 DIV8 DIV7 DIV6 DIV5 DIV4 DIV3 PTC7 PTC6 PTC5 PTC4 PTC3 PTD2 PTD1 PTD0 HP10 HP9 HP8 HP7 HP6 HP5 HP4 HP3 DSP10 DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 VS1L1Z LIN9 LIN8 LIN7 LIN6 LIN5 LIN12 LIN11 LIN10 TEST13 C8 C8 CC1 CC0 CC1 CC0 RC6 RC5 RC4 RC3 FC2 FC1 FC0 TEST28 TEST27 TEST26 TEST10 TEST29 TEST22 TEST21 TEST14 TEST15 TEST16 TEST17 TEST30 DSPON SPACE0 VSZ2L1 VSZ2L0 V18SZ1 V18SZ0 RAMERS C2 C1 C0 C2 C1 C0 DIV2 DIV1 DIV0 PTC2 PTC1 PTC0 TEST3 TEST2 TEST1 TEST0 HP2 HP1 HP0 DSP2 DSP1 DSP0 V1SZ1 V1SZ0 LIN4 LIN3 LIN2 POLH POLV VMASK B/F RC2 RC1 RC0 VSZ1H1 VSZ1H0 VSZ1L0 MEMORY CONSTITUTION Address 00016 to 11F16 are assigned to the display RAM, address 12016 to 12816 are assigned to the display control registers. The in- ternal circuit is reset and all display control registers (address 12016 to 12816) are set to "0" when the AC pin level is "L". And then, RAM is not erased and be undefinited. For detail, see "DATA INPUT EXAMPLE". Memory constitution is shown in Figure 1. Fig.1 Memory constitution (Display RAM, Display Control register) |
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