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HD6432351 数据表(PDF) 49 Page - Renesas Technology Corp |
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HD6432351 数据表(HTML) 49 Page - Renesas Technology Corp |
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49 / 1025 page ![]() Section 1 Overview Rev. 3.00 Sep 15, 2006 page 15 of 988 REJ09B0330-0300 Pin No. Type Symbol TFP-120 FP-128 I/O Name and Function Operating mode control MD2 to MD0 115 to 113 125 to 123 Input Mode pins: These pins set the operating mode. The relation between the settings of pins MD2 to MD0 and the operating mode is shown below. These pins should not be changed while the H8S/2350 Group is operating. MD2 MD1 MD0 Operating Mode 0 0 0 — 1 Mode 1 1 0 Mode 2* 1 Mode 3* 1 0 0 Mode 4 1 Mode 5 1 0 Mode 6* 1 Mode 7* Note: * Only applies to the H8S/2351. System control RES 73 81 Input Reset input: When this pin is driven low, the chip is reset. The type of reset can be selected according to the NMI input level. At power-on, the NMI pin input level should be set high. STBY 75 83 Input Standby: When this pin is driven low, a transition is made to hardware standby mode. BREQ 88 96 Input Bus request: Used by an external bus master to issue a bus request to the H8S/2350 Group. BREQO 86 94 Output Bus request output: The external bus request signal used when an internal bus master accesses external space in the external bus-released state. BACK 87 95 Output Bus request acknowledge: Indicates that the bus has been released to an external bus master. |
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