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H8S/2240 数据表(PDF) 447 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 447 Page - Renesas Technology Corp |
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447 / 818 page  Section 12 Serial Communication Interface (SCI) Rev.3.00 Mar. 26, 2007 Page 405 of 772 REJ09B0355-0300 12.1.2 Block Diagram Figure 12.1 shows a block diagram of the SCI. RxD TxD SCK Clock External clock φ φ/4 φ/16 φ/64 TEI TXI RXI ERI SCMR RSR RDR TSR TDR SMR SCR SSR BRR : Smart Card mode register : Receive shift register : Receive data register : Transmit shift register : Transmit data register : Serial mode register : Serial control register : Serial status register : Bit rate register SCMR SSR SCR SMR Transmission/ reception control Baud rate generator BRR Module data bus Internal data bus RDR TSR RSR Parity generation Parity check Legend: TDR Figure 12.1 Block Diagram of SCI |
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