H8SSLASH2240 datasheet(215/818 Pages) RENESAS

部件名	H8S/2240

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series

PDF	818 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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215 / 818 page

Section 6 Bus Controller

Rev.3.00 Mar. 26, 2007 Page 173 of 772

REJ09B0355-0300

If the BREQOE bit in BCRL is set to 1, when an internal bus master wants to make an external

access in the external bus released state, the

BREQO pin is driven low and a request can be made

off-chip to drop the bus request.

When the

BREQ pin is driven high, the BACK pin is driven high at the prescribed timing and the

external bus released state is terminated.

In the event of simultaneous external bus release request, and external access request generation,

the order of priority is as follows:

(High) External bus release > Internal bus master external access (Low)

6.8.3

Pin States in External Bus Released State

Table 6.6 shows pin states in the external bus released state.

Table 6.6

Pin States in Bus Released State

Pins

Pin State

23 to A0

High impedance

15 to D0

High impedance

CSn

High impedance

HWR

High impedance

LWR

High impedance

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