H8SSLASH2240 datasheet(229/818 Pages) RENESAS

229 / 818 page

Section 7 Data Transfer Controller

Rev.3.00 Mar. 26, 2007 Page 187 of 772

REJ09B0355-0300

7.2.9

Module Stop Control Register (MSTPCR)

R/W

Bit

Initial value

R/W

MSTPCRH

MSTPCRL

MSTPCR is a 16-bit readable/writable register that performs module stop mode control.

When the MSTP14 bit in MSTPCR is set to 1, the DTC operation stops at the end of the bus cycle

and a transition is made to module stop mode. However, 1 cannot be written in the MSTP14 bit

while the DTC is operating. For details, see section 18.5, Module Stop Mode.

MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bit 14—Module Stop (MSTP14): Specifies the DTC module stop mode.

Bit 14

MSTP14

Description

DTC module stop mode cleared

(Initial value)

DTC module stop mode set

7.3

Operation

7.3.1

Overview

When activated, the DTC reads register information that is already stored in memory and transfers

data on the basis of that register information. After the data transfer, it writes updated register

information back to memory. Pre-storage of register information in memory makes it possible to

transfer data over any required number of channels. Setting the CHNE bit to 1 makes it possible to

perform a number of transfers with a single activation.

H8S/2240 数据表(PDF) 229 Page - Renesas Technology Corp