H8SXSLASH1663 datasheet(581/1158 Pages) RENESAS

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Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.1.00 Jun. 07, 2006 Page 529 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

value

R/W

Description

TGIED

R/W

TGR Interrupt Enable D

Enables/disables interrupt requests (TGID) by the TGFD

bit when the TGFD bit in TSR is set to 1 in channels 0

and 3.

In channels 1, 2, 4, and 5, bit 3 is reserved. It is always

read as 0 and cannot be modified.

0: Interrupt requests (TGID) by TGFD bit disabled

1: Interrupt requests (TGID) by TGFD bit enabled

TGIEC

R/W

TGR Interrupt Enable C

Enables/disables interrupt requests (TGIC) by the TGFC

bit when the TGFC bit in TSR is set to 1 in channels 0

and 3.

In channels 1, 2, 4, and 5, bit 2 is reserved. It is always

read as 0 and cannot be modified.

0: Interrupt requests (TGIC) by TGFC bit disabled

1: Interrupt requests (TGIC) by TGFC bit enabled

TGIEB

R/W

TGR Interrupt Enable B

Enables/disables interrupt requests (TGIB) by the TGFB

bit when the TGFB bit in TSR is set to 1.

0: Interrupt requests (TGIB) by TGFB bit disabled

1: Interrupt requests (TGIB) by TGFB bit enabled

TGIEA

R/W

TGR Interrupt Enable A

Enables/disables interrupt requests (TGIA) by the TGFA

bit when the TGFA bit in TSR is set to 1.

0: Interrupt requests (TGIA) by TGFA bit disabled

1: Interrupt requests (TGIA) by TGFA bit enabled

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