H8SXSLASH1663 datasheet(585/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

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制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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585 / 1158 page

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.1.00 Jun. 07, 2006 Page 533 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

value

R/W

Description

TGFA

R/(W)* Input Capture/Output Compare Flag A

Status flag that indicates the occurrence of TGRA input

capture or compare match.

[Setting conditions]

• When TCNT = TGRA while TGRA is functioning as

output compare register

• When TCNT value is transferred to TGRA by input

capture signal while TGRA is functioning as input

capture register

[Clearing conditions]

• When DTC is activated by a TGIA interrupt while the

DISEL bit in MRB of DTC is 0

• When DMAC is activated by a TGIA interrupt while

the DTA bit in DMDR of DMAC is 1

• When 0 is written to TGFA after reading TGFA = 1

(When the CPU is used to clear this flag by writing 0

while the corresponding interrupt is enabled, be sure

to read the flag after writing 0 to it.)

Note:

Only 0 can be written to clear the flag.

H8SX/1663 数据表(PDF) 585 Page - Renesas Technology Corp