H8SXSLASH1663 datasheet(587/1158 Pages) RENESAS

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Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.1.00 Jun. 07, 2006 Page 535 of 1102

REJ09B0294-0100

10.3.8

Timer Start Register (TSTR)

TSTR starts or stops operation for channels 0 to 5. When setting the operating mode in TMDR or

setting the count clock in TCR, first stop the TCNT counter.



R/W



R/W

CST5

R/W

CST4

R/W

CST3

R/W

CST2

R/W

CST1

R/W

CST0

R/W

Bit

Bit Name

Initial Value

R/W

Bit

Bit Name

Initial

value

R/W

Description

7, 6



All 0

R/W

Reserved

These bits are always read as 0. The write value should

always be 0.

CST5

CST4

CST3

CST2

CST1

CST0

R/W

Counter Start 5 to 0

These bits select operation or stoppage for TCNT.

If 0 is written to the CST bit during operation with the

TIOC pin designated for output, the counter stops but the

TIOC pin output compare output level is retained. If TIOR

is written to when the CST bit is cleared to 0, the pin

output level will be changed to the set initial output value.

0: TCNT_5 to TCNT_0 count operation is stopped

1: TCNT_5 to TCNT_0 performs count operation

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