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H8SX/1663 数据表(PDF) 586 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 586 Page - Renesas Technology Corp

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Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.1.00 Jun. 07, 2006 Page 534 of 1102
REJ09B0294-0100
10.3.6
Timer Counter (TCNT)
TCNT is a 16-bit readable/writable counter. The TPU has six TCNT counters, one for each
channel.
TCNT is initialized to H'0000 by a reset or in hardware standby mode.
TCNT cannot be accessed in 8-bit units. TCNT must always be accessed in 16-bit units.
Bit
Bit Name
Initial Value
R/W
15
0
R/W
14
0
R/W
13
0
R/W
12
0
R/W
11
0
R/W
10
0
R/W
9
0
R/W
8
0
R/W
Bit
Bit Name
Initial Value
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
10.3.7
Timer General Register (TGR)
TGR is a 16-bit readable/writable register with a dual function as output compare and input
capture registers. The TPU has 16 TGR registers, four each for channels 0 and 3 and two each for
channels 1, 2, 4, and 5. TGRC and TGRD for channels 0 and 3 can also be designated for
operation as buffer registers. The TGR registers cannot be accessed in 8-bit units; they must
always be accessed in 16-bit units. TGR and buffer register combinations during buffer operations
are TGRA
−TGRC and TGRB−TGRD.
Bit
Bit Name
Initial Value
R/W
15
1
R/W
14
1
R/W
13
1
R/W
12
1
R/W
11
1
R/W
10
1
R/W
9
1
R/W
8
1
R/W
Bit
Bit Name
Initial Value
R/W
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W



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