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H8SX/1663 数据表(PDF) 829 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 829 Page - Renesas Technology Corp

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Section 16 USB Function Module (USB)
Rev.1.00 Jun. 07, 2006 Page 777 of 1102
REJ09B0294-0100
Bit
Bit Name
Initial
Value
R/W
Description
7
6
5
0
0
0
R
R
R
Reserved
These bits are always read as 0. The write value
should always be 0.
4
RWUPS
0
R
Remote Wakeup Status
This status bit indicates remote wakeup command
from USB host is enabled or disabled.
This bit is set to 0 when remote wakeup command
from UBM host is disabled by
Device_Remote_Wakeup due to Set Feature or Clear
Feature request. This bit is set to 1 when remote
wakeup command is enabled.
3
RSME
0
R/W
Resume Enable
This bit releases the suspend state (or executes
remote wakeup). When RSME is set to 1, resume
request starts. If RSME is once set to 1, clear this bit
to 0 again afterwards. In this case, the value 1 set to
RSME must be kept for at least one clock period of
12-MHz clock.
2
PWMD
0
R/W
Bus Power Mode
This bit specifies the USB power mode. When PWMD
is set to 0, the self-power mode is selected for this
module. When set to 1, the bus-power mode is
selected.
1
ASCE
0
R/W
Automatic Stall Clear Enable
Setting the ASCE bit to 1 automatically clears the stall
setting bit (the EPxSTL (x
= 1, 2, or 3) bit in EPSTLR0
or EPSTR1) of the end point that has returned the
stall handshake to the host. The automatic stall clear
enable is common to the all end points. Thus the
individual control of the end point is not possible.
When the ASCE bit is set to 0, the stall setting bit is
not automatically cleared. This bit must be released
by the users. To enable this bit, make sure that the
ASCE bit should be set to 1 before the EPxSTL (x
= 1,
2, or 3) bit in EPSTL is set to 1.
0
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.



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