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H8SX/1663 数据表(PDF) 1021 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 1021 Page - Renesas Technology Corp |
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1021 / 1158 page ![]() Section 22 Clock Pulse Generator Rev.1.00 Jun. 07, 2006 Page 969 of 1102 REJ09B0294-0100 Figure 22.11 shows the external circuitry recommended for the PLL circuit. Separate PLLVcc and PLLVss from the other Vcc and Vss lines at the board power supply source, and be sure to insert bypass capacitors CPB and CB close to the pins. PLLVCC PLLVSS VCC VSS Rp: 100 Ω CPB: 0.1 µF* CB: 0.1 µF* Note: * CB and CPB are laminated ceramic capacitors. Figure 22.11 Recommended External Circuitry for PLL Circuit |
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