H8SXSLASH1663M datasheet(661/1504 Pages) RENESAS

661 / 1504 page

Section 13 I/O Ports

Rev. 2.00 Sep. 24, 2008 Page 629 of 1468

REJ09B0412-0200

(7)

PA1/

BACK/(RD/WR-A)

The pin function is switched as shown below according to the combination of operating mode and

the EXPE bit, the bus controller register, the port function control register (PFCR), and the

PA1DDR bit settings.

Setting

Bus Controller

I/O Port

Module Name

Pin Function

BACK_OE

Byte Control

SRAM

Selection

(RD/

WR-A)_OE PA1DDR

BACK output *



Bus controller

RD/

WR-A output *



PA1 output

I/O port

PA1 input

(initial value)

Note:

Valid in external extended mode (EXPE = 1)

(8)

PA0/

BREQO/BS-A

The pin function is switched as shown below according to the combination of operating mode and

the EXPE bit, the bus controller register, the port function control register (PFCR), and the

PA0DDR bit settings.

Setting

I/O Port

Bus Controller

I/O Port

Module Name

Pin Function

BS-A_OE

BREQO_OE

PA0DDR

BS-A output*



Bus controller

BREQO output*



PA0 output

I/O port

PA0 input

(initial value)

Note:

Valid in external extended mode (EXPE = 1)

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