 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
H8SX/1663M 数据表(PDF) 163 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8SX/1663M 数据表(HTML) 163 Page - Renesas Technology Corp |
|
|
163 / 1504 page  Section 7 Interrupt Controller Rev. 2.00 Sep. 24, 2008 Page 131 of 1468 REJ09B0412-0200 7.2 Input/Output Pins Table 7.1 shows the pin configuration of the interrupt controller. Table 7.1 Pin Configuration Name I/O Function NMI Input Nonmaskable External Interrupt Rising or falling edge can be selected. IRQ11 to IRQ0 Input Maskable External Interrupts Rising, falling, or both edges, or level sensing, can be independently selected. 7.3 Register Descriptions The interrupt controller has the following registers. • Interrupt control register (INTCR) • CPU priority control register (CPUPCR) • Interrupt priority registers A to O, Q, and R (IPRA to IPRO, IPRQ, and IPRR) • IRQ enable register (IER) • IRQ sense control registers H and L (ISCRH, ISCRL) • IRQ status register (ISR) • Software standby release IRQ enable register (SSIER) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
