数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

SH7713 数据表(PDF) 39 Page - Renesas Technology Corp

部件名 SH7713
功能描述  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

SH7713 数据表(HTML) 39 Page - Renesas Technology Corp

Back Button SH7713 Datasheet HTML 35Page - Renesas Technology Corp SH7713 Datasheet HTML 36Page - Renesas Technology Corp SH7713 Datasheet HTML 37Page - Renesas Technology Corp SH7713 Datasheet HTML 38Page - Renesas Technology Corp SH7713 Datasheet HTML 39Page - Renesas Technology Corp SH7713 Datasheet HTML 40Page - Renesas Technology Corp SH7713 Datasheet HTML 41Page - Renesas Technology Corp SH7713 Datasheet HTML 42Page - Renesas Technology Corp SH7713 Datasheet HTML 43Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 904 page
background image
Rev.1.50 Aug. 30, 2006 Page xxxix of xl
Table 16.2
Relationship between n and Clock........................................................................ 553
Table 16.3
SCSMR Settings for Serial Transfer Format Selection......................................... 560
Table 16.4
SCSMR and SCSCR Settings for the SCIF Clock Source Selection .................... 560
Table 16.5
Serial Transfer Formats......................................................................................... 562
Table 16.6
The SCIF Interrupt Sources .................................................................................. 583
Section 17 Serial I/O with FIFO (SIOF)
Table 17.1
Pin Configuration.................................................................................................. 589
Table 17.2
SIOF Serial Clock Frequency ............................................................................... 614
Table 17.3
Serial Transfer Modes........................................................................................... 616
Table 17.4
Frame Length........................................................................................................ 617
Table 17.5
Audio Mode Specification for Transmit Data....................................................... 619
Table 17.6
Audio Mode Specification for Receive Data ........................................................ 619
Table 17.7
Setting for Number of Control Data Channels...................................................... 620
Table 17.8
Conditions to Issue Transmit Request .................................................................. 622
Table 17.9
Conditions to Issue Receive Request .................................................................... 622
Table 17.10
Transmission and Reception Reset ................................................................... 628
Table 17.11
SIOF Interrupt Sources ..................................................................................... 629
Table 17.12
Setting Condition of Transmit/Receive Interrupt Flag...................................... 630
Section 18 Ethernet Controller (EtherC)
Table 18.1
Pin Configuration.................................................................................................. 638
Section 20 Pin Function Controller (PFC)
Table 20.1
List of Multiplexed Pins (1).................................................................................. 719
Table 20.2
List of Multiplexed Pins (2).................................................................................. 720
Section 21 I/O Ports
Table 21.1
Port A Data Register (PADR) Read/Write Operations ......................................... 728
Table 21.2
Port B Data Register (PBDR) Read/Write Operations (1).................................... 729
Table 21.3
Port B Data Register (PBDR) Read/Write Operations (2).................................... 729
Table 21.4
Port C Data Register (PCDR) Read/Write Operations.......................................... 730
Section 22 User Debugging Interface (H-UDI)
Table 22.1
Pin Configuration.................................................................................................. 732
Table 22.2
H-UDI Commands................................................................................................ 734
Table 22.3
This LSI’s Pins and Boundary Scan Register Bits................................................ 735
Table 22.4
Reset Configuration .............................................................................................. 743
Section 24 Electrical Characteristics
Table 24.1
Absolute Maximum Ratings ................................................................................. 783
Table 24.2
DC Characteristics (1)........................................................................................... 785
Table 24.2
DC Characteristics (2)........................................................................................... 786



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com