M38047FEHKP datasheet(193/387 Pages) RENESAS

193 / 387 page

2-69

APPLICATION

2.4 Serial interface

Rev.1.00 Jan 14, 2005

REJ09B0212-0100Z

3804 Group (Spec.H)

Figure 2.4.30 shows registers setting relevant to serial I/O2, and Figure 2.4.31 shows a setting of

serial I/O2 transmission data.

Fig. 2.4.30 Registers setting relevant to serial I/O2

Synchronous clock : f(XIN)/32

Serial I/O2 interrupt : Interrupt disabled

ICON2

Interrupt control register 2 (Address : 003F16)

Serial I/O2 interrupt request

Confirm completion of transmitting

1-byte data by one unit.

“1” : Transmit shift completion

IREQ2

Interrupt request register 2 (Address : 003D16)

SIO2CON

Serial I/O2 control register (Address : 001D16)

Serial I/O2 used

SRDY2

output disabled

LSB first

Internal clock

Serial I/O2/timer Z interrupt source selection : Serial I/O2 interrupt

INTSEL

Interrupt source selection register (Address : 003916)

Port P63: CS signal to peripheral ICs

"L" active

Port P6 (Address : 000C16)

Port P63: Output mode

P6D

Port P6 direction register (Address : 000D16)

Set a transmission data.

Confirm that transmission of the previous data is

completed (bit 2 of the Interrupt request register 2

is “1”) before writing data.

SIO2

Serial I/O2 register (Address : 001F16)

Fig. 2.4.31 Setting of serial I/O2 transmission data

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