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M38047FEHKP 数据表(PDF) 203 Page - Renesas Technology Corp

部件名 M38047FEHKP
功能描述  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M38047FEHKP 数据表(HTML) 203 Page - Renesas Technology Corp

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2-79
APPLICATION
2.4 Serial interface
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
3804 Group (Spec.H)
Figure 2.4.42 shows a control procedure of the transmitting side, and Figure 2.4.43 shows a control
procedure of the receiving side.
Fig. 2.4.42 Control procedure of transmitting side
SIO1STS (Address : 001916), bit0?
RESET
• Communication completion
(Address : 001A16)
(Address : 001B16)
(Address : 001C16)
(Address : 000816), bit0
(Address : 000916)
P4 (Address : 000816), bit0
1
Pass 10 ms?
Y
N
TB1/RB1
(Address : 001816)
The second byte of
a transmission data
1
0
SIO1STS (Address : 001916), bit2?
1
0
Initialization
SIO1CON
UART1CON
BRG1
P4
P4D
1001X0012
000010002
8–1
TB1/RB1
(Address : 001816)
The first byte of a
transmission data
P4 (Address : 000816), bit0
0
1
0
• Port P40 set for communication control
• An interval of 10 ms generated by Timer
• Communication start
• Transmission data write
Transmit buffer empty flag is set to “0”
by this writing.
• Transmission data write
Transmit buffer empty flag is set to “0”
by this writing.
• Judgment of transferring data from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
• Judgment of transferring data from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
• Judgment of shift completion of Transmit shift register
(Transmit shift register shift completion flag)
SIO1STS (Address : 001916), bit0?
0
XXXXXXX12
q
q X: This bit is not used here. Set it to “0” or “1” arbitrarily.



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