5.0 FREQUENCY PROGRAMMATION

5.1 AM/FM Computation Resume

where:

PC = Program Counter Value (PC7 to PC0)

SC = Swallow Counter Value (SC5 to SC0)

DIV_VAL = Divider Factor

Loading registers for 11 or 12 bits of the programmable counters

1

0

PC5

PC4

PC3

PC2

PC1

PC0

1

1

SC5

(0)*

SC4

SC3

SC2

SC1

SC0

Loading registers for 5 or 6 bits of the programmable counters

11

SC5

(0)*

SC4

SC3

SC2

SC1

SC0

Setting control register for loop filter selection charge pump current bit 1, mode AM/FM selection

01

X

X

LPF2/

LPF1

CURR1 SWM/

DIR

AM

FM

Test mode inizialization (Test0 = Test1 = Test2 = 0)

0

0

TST0 TST1

TST2

Setting control register for switch output pin 9, charge pump current bit 2, reference frequency select

000

0

0

Loading registers for all bytes of the programmable counters and all control registers

0

1

PC7

PC6

LPF1/

LPF2

CURR1

SWM

DIR

AM

FM

1

0

PC5

PC4

PC3

PC2

PC1

PCO

⇒

®

11

SC5

(0)*

SC4

SC3

SC2

SC1

SC0

0

0

0

0

0

4.0 BIT ORGANIZATION OF THE BUS TRANSFER OPERATION

Loading registers for all bytes of the programmable counters and all control registers

0

1

PC7

PC6

LPF2/

LPF1

CURR1

SWM

DIR

AM

FM

1

0

PC5

PC4

PC3

PC2

PC1

PCO

⇒

®

11

SC5

(0)*

SC4

SC3

SC2

SC1

SC0

FM SWALLOW MODE

swallow 6bit

swallow 5bit (bit SC5 = 0)

TDA7326

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